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 U4062B
HF Front End for Car Radios and HiFi Receivers
Description
Technology: Bipolar
Features
D Completely integrated FM front end increases quality
level and reliability
D Oscillator with low phase noise and excellent
frequency stability
D High performance due to three AGC loops allow
extreme large signal handling
D Fulfils FTZ rules D Double-balanced high linear mixer with low-noise
figure
D IF preamplifier with dB-linear gain control D Low noise and high stability of the reference voltage
circuit for internal and auxiliary functions
Block Diagram
16 14
4
2
13
12
15
3
10
1 18
9 8 7 11 5 6
17
Figure 1. Block diagram
Ordering Information
Extended Type Number U4062B-B Package DIP18 Remarks
Rev. A1, 07-Dec-98
1 (21)
U4062B
Pin Description
Oscout VS IFout GND Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Symbol Oscout VS IFout GND MIXin VRef C BRF E AGCout GND MIXout MIXout AGCin IFin AGC BOsc EOsc Function Oscillator output Supply voltage IF output Ground Mixer input Reference voltage output Collector Base, RF preamplifier Emitter AGC output Ground Mixer output Mixer output AGC input (IF strip) IF input / IF gain control AGC time constant Base oscillator Emitter oscillator
1 2 3 4
18 EOsc 17 BOsc
16 AGC 15 IFin 14 13 12 11 10
14928
MIXin 5 VRef C 6 7
AGCin MIXout MIXout GND AGCout
BRF 8 E 9
Figure 2. Pinning DIP18
Absolute Maximum Ratings
Reference point ground, Pins 4 and 11 Parameters Supply voltage Pins 2, 12 and 13 Power dissipation Tamb = 85C Junction temperature Storage temperature range Ambient temperature range Symbol VS Ptot Tj Tstg Tamb Value 18 450 125 -50 to +125 -25 to +85 Unit V mW C C C
Thermal Resistance
Parameters Junction ambient Symbol RthJA Value 90 Unit K/W
2 (21)
Rev. A1, 07-Dec-98
U4062B
Electrical Characteristics
VS = 10 V, fiRF = 50.3 MHz, fOsc 100 MHz, fIF = fOsc - fiRF 49.7 MHz, reference point Pins 4 and 11, Tamb = +25C, unless otherwise specified, see test circuit figure 4. Parameters Test Conditions / Pins Supply voltage range Supply currents Supply current Pin 2 Mixer Pins 12 and 13 RF stage R4 = 470 W Pin 7 RF preamplifier (Rg9 = 50 W, RL7 = 200 W) DC voltage Pin 7 Pin 8 Symbol VS IS I12 + I13 I7 V7 V8 Min. 7 Typ. Max. 16 Unit V mA mA mA V V dB dBm 5 1 3 3.8 2 3.2 2.5 100 130 1.3 2 5 10.5 4.2 160
[
[
11.5 9 9 5.7 0.77 10.5 12
Power gain GRF Third order intercept IP3 Dynamic characteristics, f = 100 MHz Input impedance Z9 Forward current gain | i7/i9 | hfb Parallel output resistance R7 Parallel output capacitance C1 Noise figure NFRF Oscillator (fOsc = 100 MHz, unloaded Q = 80, resonance resistance Rg17 = 250 W) DC voltage Pin 17 V17 Pin 18 Oscillator voltage Frequency drift Pin 17 By supply voltage change dfo/dVS By temperature change dfo/dK Frequency band 300 Hz to 20 kHz, unweighted Peak CCIR V18 VOsc17
W
A/A kW pF dB V V mV kHz/V kHz/K Hz Hz Hz Hz
DfOsc(VS) DfOsc(Tj) Dfnoise Dfnoise Dfnoise
(ViRF) I1 V1 Gbuffer Z1
FM noise equivalent deviation, (Ripple voltage < 0.5 mV)
Peak CCIR, weighted with 75 ms, deemphasis FM by AM signal at mixer fiRF = 90 MHz, m = 0.8, input fM = 1 kHz, ViRF = 106 dBmV Oscillator output buffer (RL1 = 520 W) DC current load limitation Pin 1 DC voltage Pin 1 Voltage gain VOsc17 200 mV Pin 1 VOsc1/VOsc17 Harmonics Output impedance Pin 1
DfOsc
0.2 1.7 0.86 <-30 80
x
mA V
dBC
W
Rev. A1, 07-Dec-98
3 (21)
U4062B
Electrical Characteristics (continued)
VS = 10 V, fiRF = 50.3 MHz, fOsc 100 MHz, fIF = fOsc - fiRF 49.7 MHz, reference point Pins 4 and 11, Tamb = 25C, unless otherwise specified, see test circuit figure 4. Mixer (Rg5 = 200 W, RL12-13 = 200 W) Conversion power gain Third order intercept Parallel input resistance Parallel input capacitance Parallel output resistance Effective output capacitance between Pin 12 and 13 f = 100 MHz f = 100 MHz Pin 5 Pin 5 Parameters Test Conditions / Pins Symbol GC IP3 R5 C5 R12 + 13 C12-13 C12-13 C12-13 gc MACG NFCSSB 2.9 3.25 2.5 Min. Typ. 7.5 3.5 5 3 55 3.1 3.5 2.7 5.8 43 5.6 3.3 3.75 2.9 Max. Unit dB dBm kW pF kW pF pF pF m-mho dB dB
[
[
f = 10.7 MHz, Pins 12, 13 parallel connected f = 10.7 MHz V12, 13 = 10 V V12, 13 = 7 V V12, 13 = 16 V | i12/u5 |, | i13/u5 | fiRF = 100 MHz, fIF = 10.7 MHz
Conversion transconductance Maximum available conversion power gain Noise figure (fIF = 10.7 MHz) Single side band DC voltage Power gain
IF preamplifier (f = 10.7 MHz, RL3 = Rg15 = 200 W) Pin 3 Maximum control voltage of V15 = 1.6 V is recommended V15 = 1.6 V V15 < 0.8 V at GmaxIF at GminIF dGIF/dI15 dGIF/dV15 dGIF/dTj at V15 1.6 V V15 < 0.8 V I15 = constant Pin 15 Pin 15 Pin 3 Pin 3 V15 = 1.6 V V3 7.6 V
Rg5(fiRF) = 450 W, fiRF = fOsc - fIF
GmaxIF GminIF
Gain control deviation by V15 External control current Gain control slope Temperature coefficient of voltage gain Pin 15 Pin 15
DGIF
SI15 SV15 TCG R15 C15 R3 C3 NFIF
24 -4 28 20 0 1.3 35 0 0.04 -0.02 2.4 5.9 350 4.1 11
dB dB dB
I15max I15min
mA mA
dB/mA dB/V dB/K dB/K dB/K kW pF
Parallel input resistance Parallel input capacitance Parallel output resistance Parallel output capacitance Noise figure
W
pF dB
4 (21)
Rev. A1, 07-Dec-98
U4062B
Electrical Characteristics (continued)
VS = 10 V, fiRF = 50.3 MHz, fOsc 100 MHz, fIF = fOsc - fiRF 49.7 MHz, reference point Pins 4 and 11, Tamb = 25C, unless otherwise specified, see test circuit figure 4. Parameters DC voltage Saturation voltage Input current Maximum allowable current Maximum control current for external PIN-diode RF stage output Mixer-stage output External AGC voltage Internal AGC voltage Reference voltage source Output voltage, without load Temperature dependence of V6 Internal differential resistance Ripple rejection Noise voltage / Hz I6 = 0 Pin 6 |V6| Tamb = -25 to +85C dV6/dI6 when I6 = 0 mA 20 log (dVs/dV6) when I6 = 0 mA when I6 = 0 and f = 25 Hz f = 125 Hz f = 1 kHz f = 10 kHz V14 = V6 VIF13 = 1 V I10 = 0 V14 Test Conditions / Pins Pin 16 Symbol V16 V10min -I14 I14max Idiode Min. Typ. 1.0 0.08 0.01 0.2 0.1 50 I7 Max. Unit V V AGC circuit (no signal at Pins 5 and 9) Pin 10
6
[
[
xV
Pin 14 Pin 14
mA mA
AGC threshold voltages (respecting V10 = 0.25 V) Pin 7 Pin 13 Pin 14 Pin 16 VRF7 VIF13 V14min V16min V6 1.6 450 300 0.9 1.4 1.7 20 50 65 0.6 0.37 0.1 0.1 1.8 mV mV V V V mV
DV6 (T)
rd6
W
dB
a6
mV mV mV mV
Rev. A1, 07-Dec-98
5 (21)
U4062B
Test Circuit
Figure 3. Test circuit
RF Preamplifier
Figure 4. Test circuit
6 (21)
Rev. A1, 07-Dec-98
U4062B
7 6.5 V7 ( Pin 7 ) ( V ) 6 5.5 5 4.5 4 6
95 10410
12 11.5 11 10.5 10 9.5 9 -40 -20
95 10413
8
10
12 VS ( V )
14
16
G RF ( dB )
0
20
40
60
80
100
Tj ( C )
Figure 5. V7 vs. VS
20 17.5 15 I 7 ( Pin 7 ) ( mA ) 12.5 10 7.5 5 1.5 2.5 0 6
95 10411
Figure 8. GRF vs. Tj
4 3.5 3 100W 2.5 2 Rg9=50W
FRF ( dB )
1 8 10 12 VS ( V ) 14 16
95 10414
0
2.5
5
7.5
10
12.5
15 17.5
20
I9 ( mA )
Figure 6. I7 vs. VS
11
Figure 9. FRF vs. Ig
10.5 GRF ( dB )
10
9.5
9 6
95 10412
8
10
12 VS ( V )
14
16
Figure 7. GRF vs. VS
Rev. A1, 07-Dec-98
7 (21)
U4062B
Oscillator/ Oscillator Output Buffer
Figure 10. Test circuit - free running oscillator frequency fOsc 100 MHz
20 fosc=100MHz 15 10 5 0 -5 -10 6
95 10415
104
V OSC Pin 1 ( dBm ) 16
103
Df OSC ( kHz )
102
101
100 8 10 12 VS ( V ) 14 6
95 10418
8
10
12 VS ( V )
14
16
Figure 11.
30
DfOsc vs. VS
103 fosc=100MHz
Figure 13. VOsc vs. VS
20 V OSC Pin 1 ( dBm ) 100
Df OSC ( kHz )
10
102
0 -10 -20 -40 -20
0
20
40
60
80
101 -40
95 10417
-20
0
20
40
60
80
100
95 10416
Tj ( C )
Tj ( C )
Figure 12.
DfOsc vs. Tj
Figure 14. VOsc vs. Tj
8 (21)
Rev. A1, 07-Dec-98
U4062B
120 100 90 110 VO OSC ( dBmV ) a FM ( dB ) 80
95 10419
80 70 60 50 40
100
90 80
30 70 90 100 110 120
95 10420
20 80 85 90 95 100 105 110 115 Vi OSC Pin 17 ( dBmV ) ViRF ( dBmV )
Figure 15. VOsc vs. Vi Osc
Figure 16. aFM vs. ViRF
Mixer
Figure 17. Test circuit
IL1, IL2 = Insertion loss of the RF transformers Conversion power gain GC = 20 log (2 VoIF/ViRF) + IL1 (dB) + IL2 (dB) VRF5-6 (dBmV) = ViRF (dBmV) - IL1 (dB) + 6 VIF12-13 (dBmV) = VoIF (dBmV) - IL2 (dB) + 6 DGC = GC (VOSC17) - GC (nominal) Input to output IF isolation aIF = 20 log (2 VoIF/ViIF) + IL1 (dB) + IL2 (dB) - GC (nominal) Characteristics aFM versus viRF, see previous page Oscillator frequency immunity against amplitude modulated signal at mixer input (Pin 5-6) related to FM standard modulation: aFM = 20 log [75 kHz/DfOSC(viRF)] whereas viRF = mixer input signal (fiRF = 89.3 MHz, m = 0.8, fM = 1 kHz)
Rev. A1, 07-Dec-98
9 (21)
U4062B
10 10 0 9 ( mA ) ( dB ) -10 -20 aIF -30 -40 6 6
95 10421
DGC
8
7
DG C, a IF
16
I
12 + I 13
-50 8 10 12 VS ( V ) 14 80
95 10424
90
100
110
120
VOSC Pin 17 ( dBmV )
Figure 18. I12 + I13 vs. VS
8 15
Figure 21.
DGc, aIF vs. VOsc Pin 17
NFC 7.5 G C, NF ( dB ) C GC ( dB ) 13
11
7
9 7 GC 5
6.5
6 6
95 10422
8
10
13 VS ( V )
14
15
95 10425
80
90
100
110
120
VOSC pin 17 ( dBmV )
Figure 19. GC vs. VS
8 130 120 110 100 90 80 6 -40
95 10423
Figure 22. GC NFC vs. VOsc Pin 17
7.5 GC ( dB )
7
6.5
VIF pin 12-13 ( dBmV ) 100
70 -20 0 20 40 60 80 60
95 10426
70
80
90
100
110
120
Ti ( C )
VRF pin 5-6 ( dBmV )
Figure 20. GC vs. Tj
Figure 23. VIF Pin 5-6 vs. VRF Pin 5-6
10 (21)
Rev. A1, 07-Dec-98
U4062B
3.75 3.5 C 12-13 ( pF ) 3.25 3.0 2.75 2.5 2.25 2.0 6
95 10427
10 9 F CSSB ( dB ) 16
95 10428
8 7 6 5 4
8
10
12 VS ( V )
14
0.1
0.2 Rg5 ( kW )
0.5
1.0
Figure 24. C12-13 vs. VS
Figure 25. FCSSB = Noise figure reading /dB-IL/dB IL = Insertion loss of the tuned transformer network
Figure 26. Test circuit for single sideband noise (FCSSB)
Rev. A1, 07-Dec-98
11 (21)
U4062B
AGC Circuit
IL1, IL2 = Insertion loss of the RF transformers, VRF7 (dBmV) = VIRF (dBmV) - IL1 (dB)+ 6 VIF13 (dBmV) = ViIF (dBmV) - IL2 (dB)
Figure 27. Test circuit
1.0 V14=1.7V 0.8 V10 ( V ) V10 ( V ) 7V 10V VIF13 0.4 0.2 0 100
95 10429
1.0 VS=15V 0.8 V14=1.3V 0.6 1.1V 0.4 1.0V 0.2 0.9V 1.2V
0.6
VRF7
104
108
112
116
120
95 10430
0.8V 0 105 107.5 110 112.5 115 117.5 120 122.5 125 VIF13 ( dBmV )
VRF7, VIF13 ( dBmV )
Figure 28. V10 vs. VRF7, VIF13
Figure 29. V10 vs. VIF13
12 (21)
Rev. A1, 07-Dec-98
U4062B
1.0 VS=15V 0.8 10V V10 ( V ) 0.6 7V 0.4 0.2 0 0.5
9510431
1.0
0.8 V10 ( V )
0.6 VS=7V 0.4 0.2 0 -0.2 15V 10V
0.7
0.9
1.1
1.3
1.5
95 10432
0
0.2
0.4
0.6
0.8
1.0
1.2
V16 ( V )
-I16 ( mA )
Figure 30. V10 vs. V16
Figure 31. V10 vs. -I16
IF Preamplifier
IL1, IL2 = Insertion loss of the RF transformers Power gain GF = 20 log (2 VoIF/ViRF) + IL1 (dB) + IL2 (dB) ViIF15 (dBmV) = ViIF (dBmV) - IL1 (dB) + 6 VoIF3 (dBmV) = VoIF (dBmV) - IL2 (dB) + 6
Figure 32. Test circuit
Rev. A1, 07-Dec-98
13 (21)
U4062B
35 120 110 VoIF 3 ( dBmV ) V15=1.6V G IF ( dB ) 25 V15=1.8V 100 90 0.6V 80 70 1.2V 10 6
95 10433
30
20 15
60 8 10 12 VS ( V ) 14 16
95 10436
60
70
80
90
100
110
120
VI IF Pin 15 ( dBmV )
Figure 33. GIF vs. VS
35 30 25 1.5V 20 1.4V V15=1.7V 1.6V G IF ( dB ) F IF ( dB ) 20 17.5 15 12.5 10 -20 0 20 40 60 80 100
95 10437
Figure 36. VoIF3 vs. VI IF Pin 15
25 22.5
15 1.3V 1.2V 10 1.1V 5 -40
95 10434
0
5
10
15 GIF ( dB )
20
25
30
Tj ( C )
Figure 34. GIF vs. Tj
30
Figure 37. FIF vs. GIF
20 G IF ( dB )
10
0
-10 0
95 10435
0.5
1.0 V15 ( V )
1.5
2.0
Figure 35. GIF vs. V15
14 (21)
Rev. A1, 07-Dec-98
U4062B
Reference Voltage
Figure 38. Test circuit
13 12.5 10 7.5 10V 5 VS=18V 2.5 0 -2.5 7V -5 10.5 10 6
95 10438
11.5 11
DV6 ( mV )
16
12 I2 ( mA )
-7.5 8 10 12 VS ( V ) 14 -10 -20
95 10440
0
20
40 Tj ( C )
60
80
100
Figure 39. I2 vs. VS
20 10 2.0 1.9 1.8
Figure 41.
DV6 vs. Tj
DV 6 ( mV )
0 V6 ( V ) 16 -10 -20 -30 -40 6 8 10 12 VS ( V ) 14
1.7 1.6 1.5 1.4 1.3 1.2 -1 0 1 2 I6 ( mA ) 3 4 5
95 10439
95 10441
Figure 40.
DV6 vs. VS
Figure 42. V6 vs. I6
Rev. A1, 07-Dec-98
15 (21)
U4062B
Application Circuit
Figure 43. Typical Application circuit for high performance FM front end using non-repetitive alignment concept
16 (21)
Rev. A1, 07-Dec-98
U4062B
Coils Specifications
L8/L9 Toko 7 PL9/ (18 + 18) turns Nr. 218 ANS - 788 N Toko 7 Kl 3 turns Nr. 291 ENS - 2054 IB or Toko MC 122 Nr. E528 SNAS - 100075 Toko 7 Kl without case 4/8 turns Nr. 291 ENF - 2342 x Toko 7 Kl 4 turns Nr. 291 ENS - 2341 IB or Toko MC 122 Nr. E528 SNAS - 100076 Choke 1.5 mH Toko 348 LS - 1R5 or similar Toko CFSK - 107M3 or similar Electrical Connections LO output VS IF output Ground Mixer input Reference output voltage RF preamplifier (collector) RF preamplifier (base) RF preamplifier (emitter) AGC output Ground Mixer output Mixer output AGC input IF input, IF gain control AGC time constant LO (base) LO (emitter) Pin DIP18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Voltage (DC) in V 1.73 8.5 6.1 0 1.7 1.7 8.5 1.3 0.53 0.07 0 8.5 8.5 1.7 1.54 1.06 3.2 2.51
L10
L11/L12
L13
L14/L17
CF1; CF2
VS = 8.5 V, Tamb = 25C
FM Front End Data Using Application Circuit
Antenna impedance 75 W, Zload IF = 330 W, VS = 8.5 V, Tamb = 25C Characteristics Supply current Tuning range Tuning voltage - at 88 MHz (equal IC's reference voltage) - at 108 MHz Center IF IF output bandwidth at -3 dB Power gain Gain variation versus the band Noise figure Image rejection RF intermodulation 1/2 IF rejection Spurious response, second osc. harmonic IF rejection Osc. output voltage at 520 W load VOSC * Depending on ceramic IF filters to be used Rev. A1, 07-Dec-98 85 200 Symbol IS f Vtune Vtune f BIF G 88 1.7 6.5 10.7* 130* 46* 1 6 57 70 70 90 90 Min. Typ. 32 108 Max. Unit mA MHz V V MHz kHz dB dB dB dB dB dB dB dB mV
DG
NF
17 (21)
U4062B
Test conditions
D De-emphasis - 75ms D AF bandwidth 30 to 20 kHz D RMS, unweighted
Setup for one signal measurement
D fD = 98 MHz
Note: VoAF related to 75 kHz dev., 1 kHz, ViD = 66 dB mV Setup for three signals intermodulation measurement
Figure 44. Block diagram of the test set up
80 70 60 ViD ( dBmV ) 50 40 30 20 10 0 60
95 10443
D D D D
SD
:
fD = 98 MHz, FM: 1 kHz, 22.5 kHz dev. FM: 0.15 kHz, 22.5 kHz dev. Unmodulated for 35 dB SINAD
SUD1 : SUD2 : ViD :
fUD1=98.8MHz, fUD2=99.6MHz fUD1=94.8MHz, fUD2=91.6MHz fUD1=97.2MHz, fUD2=96.4MHz
fUD1=101.2MHz, fUD2=104.4MHz 70 80 90 100 110 120
ViUD1, 2 ( dBmV )
Figure 45. VID vs. ViUD1,2 VID = input desired, ViUD = input undesired
20 FM: 1 kHz, 75 kHz dev. 0 VoAF ( dB ) FM: 1 kHz, 22.5 kHz dev.
-20
-40 -60 -80 0 10 20 Noise 30 40
THD: 1 kHz, 75 kHz dev.
AM: 1 kHz, 30% 50 60 70 80 90 100 110
95 10442
ViD ( dBmV )
Figure 46. VoAF vs. ViD
18 (21)
Rev. A1, 07-Dec-98
U4062B
VHF/UHF-Application
Figure 47. Test circuit for conversion gain and noise measurement
Mixer, VHF Characteristics
Test conditions:
Rg5 = 50 W, RL12-13 = 200 W, VS = 10 V fIF = 10.7 MHz, fiRF = 200 MHz, fOSC = fiRF + fIF, VOSC17 = 140 mV Parameter Symbol GC GC NFDSB IP3 Rp5 Cp5 Rp17 Cp17 GC
12 11 70mV NF DSB ( dB ) 10 140mV 9 280mV 8 7 140mV 6
Typ. 2.5 2.3 8.2 5.5 1500 3.3 4000 2.7 6.4
Unit dB dB dB dBm pF pF m-mho
fIF = 10.7 MHz fIF = 70 MHz Double side band noise figure fOSC = 200 MHz 3rd order intercept input signal level Parallel input resistance, Pin 5, f = 200 MHz Parallel input capacitance, Pin 5, f= 200 MHz Parallel input resistance, Pin 17, f = 200 MHz Parallel input capacitance, Pin 17, f = 200 MHz Conversion transconductance
1 0.5 0 280mV -0.5 -1 -1.5 -2 0
95 10444
Conversion power gain,
W W
G C( f )/G ( 100 MHz ) C
70mV
100
200
300
400
500
95 10445
0
100
200
300
400
500
fOSC ( MHz )
fOSC ( MHz )
Figure 48. GC vs. fOSC
Figure 49. NFDSB vs. fOSC
Rev. A1, 07-Dec-98
19 (21)
U4062B
Package Information
Package DIP18
Dimensions in mm
23.3 max 7.77 7.47
4.8 max 6.4 max 0.5 min 3.3 1.64 1.44 20.32 18 10 0.58 0.48 0.36 max 9.8 8.2
2.54
technical drawings according to DIN specifications
1
9
13019
20 (21)
Rev. A1, 07-Dec-98
U4062B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423
Rev. A1, 07-Dec-98
21 (21)


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